AT45CS1282-TC【PDF 1/33 页】IC FLASH 128MBIT 50MHZ 40TSOP

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Features

? Single 2.7V - 3.6V Supply

? Dual-interface Architecture

– RapidS ? Serial Interface: 50 MHz Maximum Clock Frequency

(SPI Modes 0 and 3 Compatible for Frequencies up to 33 MHz)

– Rapid8 ? 8-bit Interface: 20 MHz Maximum Clock Frequency

Page Program

– 16,384 Pages (1,056 Bytes/Page) Main Memory

Sector Erase Architecture

– Sixty-three 270,336-byte Sectors

– One 261,888-byte Sector

– One 8,488-byte Sector

128-megabit

Two 1056-byte SRAM Data Buffers – Allows Receiving of Data

while Reprogramming the Flash Array

Continuous Read Capability through Entire Array

– Ideal for Code Shadowing Applications

Low-power Dissipation

– 10 mA Active Read Current Typical – Serial Interface

– 12 mA Active Read Current Typical – 8-bit Interface

– 15 μA CMOS Standby Current Typical

Hardware Data Protection

Security: 128-byte Security Register

– 64-byte User Programmable Space

– Unique 64-byte Device Identifier

JEDEC Standard Manufacturer and Device ID Read

100 Program/Erase Cycles Per Sector Minimum

Data Retention – 10 Years

Commercial Temperature Range

2.7-volt

Dual-interface

Code Shadow

DataFlash ?

AT45CS1282

Preliminary

Description

The AT45CS1282 is a 2.7-volt, dual-interface sequential access Flash memory

ideally suited for infrequent code shadowing applications. This device utilizes Atmel’s

e - STAC ? Multi-Level Cell (MLC) memory technology, which allows a single cell to

Pin Configurations

TSOP Top View: Type 1

Pin Name

SCK/CLK

Function

Chip Select

Serial Clock/Clock

Serial Input

Serial Output

RDY/BUSY

RESET

VCC

GND

SCK

SI*

SO*

I/O7*

I/O6*

I/O5*

I/O4*

VCCP*

GNDP*

I/O3*

I/O2*

I/O1*

I/O0*

SER/BYTE*

CLK

I/O7 - I/O0

8-bit Input/Output

CBGA Top View

Hardware Page Write

Protect Pin

RESET

Chip Reset

RDY/BUSY

Ready/Busy

NC SER/BYTE NC

I/O7

I/O6

SER/BYTE

Serial/8-bit Interface

Control

I/O2 SCK/CLK GND VCC

I/O1 CS RDY/BUSY WP

I/O5

I/O4

I/O0

RESET I/O3

GNDP VCCP

Note:

*Optional Use – See pin description text

for connection information.

Rev. 3447A–DFLSH–2/04

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